| Dataset for the paper "A Deep Learning Framework for Verilog Autocompletion Towards Design and Verification Automation": | |
| ``` | |
| @misc{dehaerne2023deep, | |
| title={A Deep Learning Framework for Verilog Autocompletion Towards Design and Verification Automation}, | |
| author={Enrique Dehaerne and Bappaditya Dey and Sandip Halder and Stefan De Gendt}, | |
| year={2023}, | |
| eprint={2304.13840}, | |
| archivePrefix={arXiv}, | |
| primaryClass={cs.LG} | |
| } | |
| ``` | |
| Disclaimer: I am not the original author and uploaded this here only for convenience. Please refer to the original repo for any information. | |
| https://github.com/99EnriqueD/verilog_autocompletion |